Design Digitaler Schaltkreise

  • Lecture
    • Introduction to DDS
    • Digital Design Flow Introduction
      • Global Definition of a System
      • Synchronous Logic Systems and Pipelining
      • System Specification
      • Verification
      • Technology Mapping
    • Verilog Hardware Description Language
      • Standard Programming languages and HDL
      • Register Transfer Level (RTL)
      • Synthesisable and Simulation Subsets
      • Hierarchy Definition
      • Signals: Input / Output
      • Pipeline Stage Definition
      • Hierarchy Parameter etc...
  • Lab
  • Sources and Online Access
    • ILIAS
    • Online Access
    • Offline Access
    • Sources Access
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